The Parallella Board Uncovered

Introduction

Throughout the Parallella Kickstarter project we have described the Epiphany accelerator in great detail but we haven’t talked much about the dual-core ARM-A9 host processor on the board.  Today we are officially announcing that the host processor is the Zynq7010 from Xilinx, a wonderful little device that combines a very capable CPU sub system with programmable logic inside a single low cost chip.  For us, it was love at first sight!  Finally an FPGA device with the right balance of logic gates, CPU horse power, and price point for our needs.  The figure below shows how we are combining the Xilinx Zynq processor with our Epiphany accelerator chip to create a very disruptive platform. The Parallella board is truly a  heterogeneous parallel computing platform that encourages programmers to use the most efficient resource to get the job done.

 

Zynq7010 Introduction:

Let’s take a closer look at the Zyng host processor that  integrate a dual-core ARM® Cortex™-A9 MPCore™ based processing system and Xilinx programmable logic in a single device. The ARM Cortex-A9 CPUs are the heart of a processor sub system that includes on-chip memory, external memory interfaces, and a rich set of I/O peripherals. The Zynq device contains the following key features:

  • Two ARM A9 cores with Neon,  32KB ICache/32KB DCache running at 800MHz
  • 512KB Shared L2 Cache
  • 32bit wide DDR3/LPDDR2 Memory Controller
  • 256KB On Chip Scratchpad SRAM
  • I2C, USB, SPI, GigE, SD, CAN, UART, Flash Interface
  • 28K Logic Cells

To get access to the openly published architecture reference manuals and datasheets, please visit http://www.xilinx.com/support/documentation/zynq-7000.htm.

 

Programmable Logic Introduction

For programmers not intimately familiar with hardware or programmable logic, the Zynq offers a better starting point than traditional FPGA devices. The ARM CPU inside the Zynq device boots up like a regular processor from an SD card and then proceeds to configure the programmable logic using a bit stream from the SD card.  The default boot configuration of the Parallella board includes a bit stream for logic needed to interface the Zynq device to the Epiphany accelerator chip, to an HDMI chip, and to the GPIO pins. Users who want to modify the programmable logic design for their specific needs can use programming tools from Xilinx to create custom bit streams for the Parallella board.

General Purpose IO

We think the combination of the Epiphany’s raw computing performance with the flexibility of the on-board GPIO is pretty exciting. The GPIOs on the Parallella board can be configured to conform to any logical protocol that can be implemented with the 28,000 logic gates within the Zynq device. The Parallella board offers an impressive 2GB/s off board bandwidth through the GPIO pins.

We’re sure developers will come up with innovative ideas of how to use the GPIO that we could never have dreamed of, but here are some initial ideas that we are especially excited about.

Embedded Vision: Extend the Parallella platform by connecting a camera directly to the programmable logic. For high definition imaging, this is the most practical method of getting data onto the Parallella board with super high frame rates.

Data Logger: Connect a data converter daughter card to the Parallella platform to capture digitized data in real time. The Epiphany performs real time signal processing on the incoming data before storing data it in the cloud through Gigabit Ethernet connectivity

Software Defined Radio: Connect and ADC/DAC software defined radio front end card to the GPIO to create a very attractive low power software defined radio solution.  With the programmable logic, the Epiphany accelerator, and the ARM subs system, it should be possible to create a deployable low cost software defined radio platform.  Software defined radio has bee around for a long time.  It will become ubiquitous when the cost becomes “good enough”.

Medical Diagnostics:  Portable diagnostics has the potential of revolutionizing the field of medicine, once solutions become cheap enough. We are excited to hear about researchers wanting to use the Parallella platform to create low cost open source ultrasound and EKG solutions.

 

Conclusion

The combination of the ARM multicore CPU, programmable logic technology, and Epiphany signal processing technology at a $100 price has the potential of enabling a  new generation of exciting embedded applications.

 

Posted in Announcements.

One Comment

  1. That is excellent news, and confirms your forward-looking concept. I have been pursuing the Smart Fusion device, which uses an FPGA fabric with a single Cortex M3, all in a SOC. An excellent device, affordable and powerful.
    Your architecture leapfrogs the state of the art, and maintains an affordable entry point for all of us.

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