Adapteva’s Epiphany silicon proven processor technology has been in development since 2008 and has shipped to over 10,000 customers to date. The following IP products are available for qualified commercial entities. Interested parties should send an email to support@adapteva.com.
Epiphany Architecture License:
The Epiphany processor and Network-On-Chip technology is available as configurable Verilog RTL. The configurable IP allows enables automatic generation of 2D arrays for processing elements with performance scalable to over 100TOPS at 16nm.
Configurations possible:
- Processing elements: Epiphany CPU or emesh compatible accelerator at every node
- Mesh Networks: 1-8
- Address width: 16/32/64
- Floating Point Format: 32/64
- Integer Format: 8/16/32/64
- Selectable: DMA, interrupt controller, timers
- Local Memory Banks: 2-4
- Local SRAM size: 1-64KB
Epiphany-V Processor IP:
Taped out DARPA sponsored 64-bit 1024-core processor IP available at TSMC 16nm process node. Available as soft IP (Verilog RTL) and as hard macro GDS. A description of the device can be found HERE.
Epiphany-IV Processor IP:
Silicon proven 32-bit 64-core processor IP available at Globalfoundries 28nm process node. Available as soft IP (Verilog RTL) and as hard macro GDS. This product has shipped to two Tier-1 base station vendors and has has been thoroughly validated through external unbiased publications. The datasheet for the 64-core silicon device can be found HERE.
Epiphany-III Processor IP:
Silicon proven 32-bit 16-core processor IP available at Globalfoundries 65nm process node. Available as soft IP (Verilog RTL) and as hard macro GDS. This product has shipped to over 10,000 customers across the globe as part of the Parallella project. It has been thoroughly validated through external unbiased publications. The datasheet for the 16-core silicon device can be found HERE.