An Introduction to Semiconductor Economics


This blog post is in response to a recent topic on the Parallella forum regarding Adapteva’s chip cost efficiency (GFLOPS/$): [forum discussion thread].

I had to be a little vague on some points because I can’t disclose our own specific vendor costs due to confidentiality restrictions

Chip Development Costs

Let’s start by exploring how much money it costs to design modern chips. Super complex SOC platforms like Apple’s Ax family or the IBM Cell very likely exceeded $1B in total development costs and involved thousands of engineers in aggregate. Meanwhile relatively simple SOCs like the Epiphany family of chips were designed for less than $3M over the span of 3 years.[1,2] Even simpler application specific chips (ASICs) like bitcoin mining chips could be designed for a budget under $1M.

Category Cost Range  Factors
HW Development $300K-$200M Total # of chip designers needed to create a chip product. Includes architects, logic designers, verification engineers. (~$200K per engineer in SV).  Team sizes can range from 3 (startup) to 1000 (Intel) engineers.
SW Development $0-$800M Total # of software developers needed to create a sellable product.  This can include application developers, driver developers, validation developers, library developers. (~$200K per engineer in SV). Team sizes can range from ~0 (true ASICs) to 1000’s of developers.
IP Licensing $0-$10M Many foundries offer sponsored free IP today for SRAM, IO, and logic cell libraries. Other IP like CPU cores and state of the art high speed IO can be very expensive.(>$1M each) The more features and the more state of the art IP is included in a product, the more expensive it gets. Additional cost of IP integration and validation complexity gets added in with the HW/SW engineering salary costs.
EDA Tools $0K-$10M EDA tool costs depends on how much risk you are willing to take with your design. For an SOC that is scheduled to go into the latest smartphone, failure is not an option and no expense is spared in terms of the simulation and validation tool costs! For simpler less high profile chip products it may be better to trade risk of a respin for less costly tools. If companies with more than one product, if the tools are “there and paid for” then the product’s incremental cost can be $0.
Chip Tapeout $100K-$3M State of the art production mask tapeouts can cost as much as $3M. Chips that ship in the millions must use these production masks to get cost down. Meanwhile, companies that sell chips in low volume at high prices may choose to use one time shuttles (like MOSIS) to produce a batch of chips at a time using a multi project wafer. [3]
Test Development $5K-$1M Test development costs depend on per-unit test costs and the requirements imposed by the respective markets. For high volume products, cost components include: test fixture design and procurement, automated test program development, and characterization/qualification. High-price/low-volume system specific products may get away with low cost manual bench-top testing.

Summary: Chip development costs start at $1M and can reach up to $1B depending on the complexity of the product.

Chip Production Costs

The following table shows the different cost components involved in producing a chip ready for mass production.

Cost Component Range Factors
Silicon $0.1-$1000 Foundries have traditionally charged a flat fee per wafer produced, so the more perfect dies one can get out of a single wafer (usually 300mm diameter in size), the better. A small ~10mm^2 design with perfect yield will have a yield silicon cost that is less than 1/20th of a design with 100mm^2 and 50% yield! [4-6]
Package $0.01-$30 Simplicity and volume are again first order factors. Simple wire-bond LQFP and BGA packages can be as cheap as $0.1 in ultra high volume. Meanwhile, larger thermally advanced custom flip-chip packages produced in low volume cost tens of dollars. The more expensive the package, the more important it is to make sure there is no yield fallout post-packaging.
Chip-Assembly $0.01-$50 Bare die shipping and simple wire bond packages assembled in completely automated volume production facilities cost are very inexpensive, while low volume production (<10,000) with a high number of manual touches can cost as much as $50 per device.
Testing $0-$10 Test costs depend on test equipment time and operator labour rates. With automated chip testing equipment often costing millions of dollars, per second depreciation time can be significant. Factory labour rates can range from $5-$75/hour per person depending on where the testing is being done. In all cases, test cost is minimized by minimizing test time.
IP Royalty $0-$2 Some IP modules used in chip design demand per chip royalty fees. In most cases, IP royalty is not a first order concern in determining chip costs.

Summary: As chip production volumes increases, the per unit cost inevitably goes down. In any one of these categories, the difference in per unit cost between building 10,000 units and 10M units can be anywhere from 2X to 10X. For startups and small companies, having access to Tier-1 high volume manufacturing partners is “a must” in order to to compete on value with established companies. With the right foundry, assembly, and test partners in place, established semiconductor companies and startups alike compete on a level playing field to start, but the company that ships the most units will generally have an insurmountable profitability advantage over time. [A rule of thumb that seems to hold true in most electronics markets, not just semiconductor. Modern day Samsung is a prime example.]

Chip Pricing

Now that we have covered development and production costs, let’s get back to the poster’s original topic regarding pricing. There are a few different types of pricing data available for semiconductor products

  • Teaser pricing”: Semiconductor companies sometimes announce high volume pricing for new products without specifying how many units need to be purchased. If you have to ask how many that means, you are probably not going to be able to get that price.
  • “Rumor pricing”: Someone supposedly got pricing X on a certain product. Completely meaningless data unless someone extended you an offer to buy chips at that price.
  • Company Price List: Many semiconductor companies will publish 1K volume pricing for their openly available products. This is a great start, since these pricing tables are used as a guideline for external distributors. Note that large volume semiconductors distributors rarely carry inventory, so it may take up to 12 weeks to get parts shipped to you at these prices.
  • Retail Pricing: The price you see advertised for a single chip in stock from catalogue distributors (like RS components and Digikey). This is the price of a chip in inventory that ships within 24 hours.

Summary: The only price that matters in the end is the one that has been officially offered YOU. The difference between an advertised single unit “retail” price and a customer who buys 10M units a year can be as much as 10X.

Chip Sales Process

A factor that clearly contributes to high pricing for low-volume customers is the fixed overhead support burden associated with customer product evaluation and the “opportunity” cost associated with the time spent with every customer. The table below shows the process that a semiconductor vendor will goes through with every customer before revenue is finally realized.

Stage Time Revenue  Factor
Evaluation 3-18 months (LOSS)


Evaluation success directly related to level of support provided by chip company (or partner) during evaluation phase. Without proper support evaluation time increases and success gate goes down dramatically. Semiconductor vendors must carefully differentiate between “tier kickers wit an idea” and serious developers. (10-50% success rate)
Design 6-12 months <$5K Customer buys a few chips and gets to product completion without being canceled for one reason or another. (10-50% success rate)
Production Ramp 12-36 months $10K-$10M Chip customer starts shipping to its own end customer in volume (<10% chance)

Summary: As shown, a semiconductor company has to wait (and survive) for a long time until the company’s customers’ customers start buying products in significant volume. The long time to money and open competition at each one of these layers makes the semiconductor market a tough place for a start-up to succeed in. For a company that spent $1M to develop a new chip product, the “best case” scenario is to get back to even 2-3 years after product launch. If you have ever been frustrated with the level of direct support from semiconductor vendors, please consider that semiconductor companies often have less than a handful of internal resources dedicated to support thousands of customers for any one product.  For semiconductor vendors, providing support boils down to betting support time (ie $) on the customers with the highest probability of buying a significant number of chips.

Chip Profitability

The chip industry has a problem! Thanks to the brutal exponential pace of Moore’s Law, you can today buy a billion transistor chip for less than the cost of a cup of coffee at Starbucks. As a result,  the semiconductor road is littered with corpses (the majority of them startups). Jack Welch’s advice to be “number on or number two in every market or get out” is a rule to live by in semiconductor. Companies that compete in high volume markets are either 1.) Hugely profitable “unicorns” (like market leaders Qualcomm (mobile), Intel (data centers), and Xilinx/Altera (FPGA) , 2) Doing OK with low gross margins in cut throat consumer markets (All Winner, Spreadtrum) or 3.) Cutting their losses by abandoning the space (Broadcom and  TI in case of the application processors).  With $1M as a minimum in product development in order to just recover the initial development costs, you can either sell 1M chips at a profit $1 per chip, sell 100,000 chip at $10 profit per chip, or 10,000 at $100 profit per chip.  From personal experience I can tell you that each one of these semiconductor product business models is incredibly difficult to pull off!


“A free market is a market system in which the prices for goods and services are set freely by consent between sellers and consumers, in which the laws and forces of supply and demand are free from any intervention by a government, price-setting monopoly, or other authority.”[7]

  • Product price is only indirectly related to manufacturing cost.
  • The “Free Beer” concept doesn’t work for hardware despite the exponential nature of Moore’s Law.
  • Companies that have lower development costs can afford to charge lower prices, but it doesn’t mean they should (or must).
  • A healthy semiconductor eco-system requires that every vendor in the electronics stack makes enough profits to survive and prosper.
  • The customer will always be the king. All other things being equal, chip companies that can’t compete on value will eventually go out of business.

I hope this post sheds some light on the somewhat opaque world of semiconductor manufacturing economics and look forward to hearing about your experiences with semiconductor costs and pricing strategies.

Andreas Olofsson is the founder of Adapteva and the creator of the Epiphany architecture and Parallella Kickstarted open source computing project. Follow Andreas on Twitter.



[1] “A Lean Fabless Semiconductor Business Model”,

[2] “Can lean innovation bring growth and profits back to semiconductors?”

[3] Multi Project Wafers

[4]The McClean Report

[5] Silicon cost calculator

[6] Yet another silicon cost calculator

[7] Free Markets